// TMB2005 to MPC2004 data simplified data transmission test
// October 14, 2009
// The TMB2005 selected for the test, is TMB6 (slot 14)
//
// program CCB
  vme->Write((bt_devaddr_t)0x680000, (WORD)0x00);
  vme->Write((bt_devaddr_t)0x680020, (WORD)0x0001);

// program MPC
  vme->Write((bt_devaddr_t)0x600004, (WORD)0x00);
  vme->Write((bt_devaddr_t)0x600000, (WORD)0x6a1e);

// program all TMB2005
  vme->Write((bt_devaddr_t)0x100090, (WORD)0x0);
  vme->Write((bt_devaddr_t)0x200090, (WORD)0x0);
  vme->Write((bt_devaddr_t)0x300090, (WORD)0x0);
  vme->Write((bt_devaddr_t)0x400090, (WORD)0x0);
  vme->Write((bt_devaddr_t)0x500090, (WORD)0x0);
  vme->Write((bt_devaddr_t)0x700090, (WORD)0x020a); // 10 words
  vme->Write((bt_devaddr_t)0x800090, (WORD)0x0);
  vme->Write((bt_devaddr_t)0x900090, (WORD)0x0);
  vme->Write((bt_devaddr_t)0xa00090, (WORD)0x0);

// program reg_86 in TMB6
  vme->Write((bt_devaddr_t)0x700086, (WORD)0xa11b);

// program BX1 in RAM in TMB6
  vme->Write((bt_devaddr_t)0x700094, (WORD)0xaaaa);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0001);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0000);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x5555);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0002);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0000);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x9999);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0004);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0000);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x4444);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0008);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0000);

// program BX2 in RAM in TMB6
  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0100);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0101);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0100);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0100);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0102);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0100);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0100);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0104);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0100);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0100);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0108);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0100);

// program BX3 in RAM in TMB6
  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0200);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0201);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0200);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0200);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0202);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0200);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0200);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0204);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0200);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0200);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0208);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0200);

// program BX4 in RAM in TMB6
  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0300);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0301);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0300);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0300);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0302);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0300);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0300);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0304);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0300);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0300);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0308);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0300);

// program BX5 in RAM in TMB6
  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0400);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0401);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0400);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0400);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0402);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0400);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0400);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0404);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0400);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0400);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0408);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0400);

// program BX6 in RAM in TMB6
  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0500);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0501);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0500);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0500);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0502);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0500);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0500);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0504);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0500);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0500);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0508);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0500);

// program BX7 in RAM in TMB6
  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0600);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0601);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0600);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0600);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0602);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0600);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0600);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0604);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0600);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0600);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0608);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0600);

// program BX8 in RAM in TMB6
  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0700);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0701);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0700);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0700);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0702);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0700);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0700);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0704);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0700);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0700);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0708);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0700);

// program BX9 in RAM in TMB6
  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0800);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0801);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0800);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0800);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0802);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0800);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0800);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0804);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0800);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0800);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0808);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0800);

// program BX10 in RAM in TMB6
  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0900);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0901);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0900);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0900);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0902);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0900);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0900);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0904);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0900);

  vme->Write((bt_devaddr_t)0x700094, (WORD)0x0000);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0900);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0908);
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x0900);



// start data transmission from TMB to MPC
  vme->Write((bt_devaddr_t)0x680022, (WORD)0x90);

// read back MPC
  vme->Read((bt_devaddr_t)0x6000a4, (WORD*)&Data);
cout << hex << "MPC_LCT1_F1 = "  << Data <<  endl;       // =aaaa
  vme->Read((bt_devaddr_t)0x6000a4, (WORD*)&Data);
cout << hex << "MPC_LCT1_F2 = "  << Data <<  endl;       // =5555

  vme->Read((bt_devaddr_t)0x6000a6, (WORD*)&Data);
cout << hex << "MPC_LCT2_F1 = "  << Data <<  endl;       // =9999
  vme->Read((bt_devaddr_t)0x6000a6, (WORD*)&Data);
cout << hex << "MPC_LCT2_F2 = "  << Data <<  endl;       // =4444

  vme->Read((bt_devaddr_t)0x6000a8, (WORD*)&Data);
cout << hex << "MPC_LCT3_F1 = "  << Data <<  endl;       // =0
  vme->Read((bt_devaddr_t)0x6000a8, (WORD*)&Data);
cout << hex << "MPC_LCT3_F2 = "  << Data <<  endl;       // =0

  vme->Read((bt_devaddr_t)0x6000ae, (WORD*)&Data);
cout << hex << "MPC_FIFO_STATUS = "  << Data <<  endl;   // =a

// read TMB2005 address 86
  vme->Read((bt_devaddr_t)0x700086, (WORD*)&Data);
cout << hex << "TMB2005_86 = "  << Data <<  endl;        // =a71b (2 valid winner bits)

// read 10 words from address 90
  vme->Write((bt_devaddr_t)0x700092, (WORD)0x000);
  vme->Read((bt_devaddr_t)0x700090, (WORD*)&Data);
cout << hex << "TMB2005_90_1 = "  << Data << endl;       // =20a

  vme->Write((bt_devaddr_t)0x700092, (WORD)0x100);
  vme->Read((bt_devaddr_t)0x700090, (WORD*)&Data);
cout << hex << "TMB2005_90_2 = "  << Data << endl;       // =20a

  vme->Write((bt_devaddr_t)0x700092, (WORD)0x200);
  vme->Read((bt_devaddr_t)0x700090, (WORD*)&Data);
cout << hex << "TMB2005_90_3 = "  << Data << endl;       // =20a

  vme->Write((bt_devaddr_t)0x700092, (WORD)0x300);
  vme->Read((bt_devaddr_t)0x700090, (WORD*)&Data);
cout << hex << "TMB2005_90_4 = "  << Data << endl;       // =20a

  vme->Write((bt_devaddr_t)0x700092, (WORD)0x400);
  vme->Read((bt_devaddr_t)0x700090, (WORD*)&Data);
cout << hex << "TMB2005_90_5 = "  << Data << endl;       // =20a

  vme->Write((bt_devaddr_t)0x700092, (WORD)0x500);
  vme->Read((bt_devaddr_t)0x700090, (WORD*)&Data);
cout << hex << "TMB2005_90_6 = "  << Data << endl;       // =20a

  vme->Write((bt_devaddr_t)0x700092, (WORD)0x600);
  vme->Read((bt_devaddr_t)0x700090, (WORD*)&Data);
cout << hex << "TMB2005_90_7 = "  << Data << endl;       // =20a

  vme->Write((bt_devaddr_t)0x700092, (WORD)0x700);
  vme->Read((bt_devaddr_t)0x700090, (WORD*)&Data);
cout << hex << "TMB2005_90_8 = "  << Data << endl;       // =20a

  vme->Write((bt_devaddr_t)0x700092, (WORD)0x800);
  vme->Read((bt_devaddr_t)0x700090, (WORD*)&Data);
cout << hex << "TMB2005_90_9 = "  << Data << endl;       // =e0a (2 valid winner bits)

  vme->Write((bt_devaddr_t)0x700092, (WORD)0x900);
  vme->Read((bt_devaddr_t)0x700090, (WORD*)&Data);
cout << hex << "TMB2005_90_10 = "  << Data << endl;      // =20a

return 0;