// program TTCrx chip over I2C // CCB base address is C00000hex // PCF8584 addresses are C00020hex and C00024hex // PCF8584 is in "68000" mode and its reference clock is 8 MHz // On TTCrx board the jumpers on ID[0..3], ID[5..7] set to "0" // and ID[4]=1, i.e. address of the pointer register is 10hex // write PCF8584 own address (55hex) vme->Write((bt_devaddr_t)0xc00022, (WORD)0x80); vme->Write((bt_devaddr_t)0xc00020, (WORD)0x55); // set SCL frequency vme->Write((bt_devaddr_t)0xc00022, (WORD)0xa0); vme->Write((bt_devaddr_t)0xc00020, (WORD)0x19); // set i2c bus into idle mode vme->Write((bt_devaddr_t)0xc00022, (WORD)0xc1); // is i2c bus busy? p0: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x1; if(Data2=0) goto p0; // write pointer address into slave address reg // vme->Write((bt_devaddr_t)0xc00020, (WORD)0x40); vme->Write((bt_devaddr_t)0xc00022, (WORD)0xC5); rst1: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x80; Data3=Data1&0x08; if (Data2 != 0) goto rst1; if (Data3 != 0) goto rst62; // write data (TTCrx register number=2) into pointer address // vme->Write((bt_devaddr_t)0xc00020, (WORD)0x02); rst2: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x80; Data3=Data1&0x08; if (Data2 != 0) goto rst2; if (Data3 != 0) goto rst63; // send stop // vme->Write((bt_devaddr_t)0xc00022, (WORD)0xc3); // is i2c bus busy? p1: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x1; if(Data2=0) goto p1; // write data into register addressed by the pointer // vme->Write((bt_devaddr_t)0xc00020, (WORD)0x42); vme->Write((bt_devaddr_t)0xc00022, (WORD)0xC5); rst3: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x80; Data3=Data1&0x08; if (Data2 != 0) goto rst3; if (Data3 != 0) goto rst65; // write data 77hex into addressed TTCrx register // vme->Write((bt_devaddr_t)0xc00020, (WORD)0x77); rst4: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x80; Data3=Data1&0x08; if (Data2 != 0) goto rst4; if (Data3 != 0) goto rst66; // send stop // vme->Write((bt_devaddr_t)0xc00022, (WORD)0xc3); // is i2c bus busy? p2: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x1; if(Data2=0) goto p2; // read data from the TTCrx register // write pointer address into slave address reg // vme->Write((bt_devaddr_t)0xc00020, (WORD)0x40); vme->Write((bt_devaddr_t)0xc00022, (WORD)0xC5); rst5: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x80; Data3=Data1&0x08; if (Data2 != 0) goto rst5; if (Data3 != 0) goto rst62; // write data (register number) into pointer address // vme->Write((bt_devaddr_t)0xc00020, (WORD)0x02); rst6: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x80; Data3=Data1&0x08; if (Data2 != 0) goto rst6; if (Data3 != 0) goto rst63; // send stop // vme->Write((bt_devaddr_t)0xc00022, (WORD)0xc3); // read data from the reg addressed by address pointer // / / write data address into slave address reg// vme->Write((bt_devaddr_t)0xc00020, (WORD)0x41); // is the I2C bus busy? // rst7: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x01; if (Data2 = 0) goto rst7; vme->Write((bt_devaddr_t)0xc00022, (WORD)0xC5); rst8: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x80; if (Data2 != 0) goto rst8; Data3=Data1&0x08; if (Data3 != 0) goto rst61; vme->Write((bt_devaddr_t)0xc00022, (WORD)0x40); // read data from data register // "dummy read" of the slave address vme->Read((bt_devaddr_t)0xc00020, (WORD*)&Data1); rst9: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x80; if (Data2 != 0) goto rst9; // send stop // vme->Write((bt_devaddr_t)0xc00022, (WORD)0xc3); // is i2c bus busy? p3: vme->Read((bt_devaddr_t)0xc00022, (WORD*)&Data1); Data2=Data1&0x1; if(Data2=0) goto p3; // read real data vme->Read((bt_devaddr_t)0xc00020, (WORD*)&Data1); Data2=Data1&0xff; cout << " TTCrx reg rd= " << Data2 << endl; // send stop // vme->Write((bt_devaddr_t)0xc00022, (WORD)0xc3); return 0; // error messages // rst61: cout << " error TTCrx addressing " << endl; Data2=Data1&0xff; cout << "Data2= " << endl; vme->Write((bt_devaddr_t)0xc00022, (WORD)0xC3); return 0; rst62: cout << " error addressing TTCrx pointer reg" << endl; Data2=Data1&0xff; cout << "Data2= " << endl; vme->Write((bt_devaddr_t)0xc00022, (WORD)0xC3); return 0; rst63: cout << " error writing data into pointer reg " << endl; Data2=Data1&0xff; cout << "Data2= " << endl; vme->Write((bt_devaddr_t)0xc00022, (WORD)0xC3); return 0; rst65: cout << " error addressing TTCrx data reg" << endl; Data2=Data1&0xff; cout << "Data2= " << endl; vme->Write((bt_devaddr_t)0xc00022, (WORD)0xC3); return 0; rst66: cout << " error writing data into TTCrx data reg" << endl; Data2=Data1&0xff; cout << "Data2= " << endl; vme->Write((bt_devaddr_t)0xc00022, (WORD)0xC3); return 0;